Faculty profile
Paul Chow
Back to facultyThis profile is built from public research funding records (CIHR, NSERC and SSHRC) and PubMed. We have not imported them from a University of Toronto directory, so their courses and email address may be missing. Find their university profile.
Research
Latest papers
High-performance reconfigurable hardware architecture for restricted Boltzmann machines.
IEEE transactions on neural networks · 2010 · senior author
Hardware acceleration of a Monte Carlo simulation for photodynamic therapy [corrected] treatment planning.
Journal of biomedical optics · 2009
Latest funding
- $118,000
The Data Centre as a Heterogeneous CPU
NSERC · 2023 · Principal investigator
- $215,592
Large-Scale Heterogeneous Computing with FPGAs: Infrastructure, Architecture and Tools
NSERC · 2023 · Principal investigator
- $282,000
Applications and Programming Models for Large-Scale Heterogeneous Computing with FPGAs
NSERC · 2017 · Principal investigator
2 publications.
High-performance reconfigurable hardware architecture for restricted Boltzmann machines.
Ly DL, Chow P
Hardware acceleration of a Monte Carlo simulation for photodynamic therapy [corrected] treatment planning.
Lo WC, Redmond K, Luu J, Chow P, Rose J, Lilge L
The Data Centre as a Heterogeneous CPU
Principal investigators: Chow, Paul
Keywords: heterogeneous computing systems; reconfigurable computing; parallel and distributed computing; field programmable gate arrays; computer systems; compilers; hardware description languages; operating systems; programming languages; hardware acceleration
Large-Scale Heterogeneous Computing with FPGAs: Infrastructure, Architecture and Tools
Principal investigators: Chow, Paul P
Keywords: computer-aided design; distributed computing; field-programmable gate arrays; hardware acceleration; heterogeneous computing; high-level synthesis; machine learning (ml); multi-fpga applications; multiprocessing; reconfigurable computing
Applications and Programming Models for Large-Scale Heterogeneous Computing with FPGAs
Principal investigators: Chow, Paul
Operations and Maintenance Support for Smart Applications and Virtual Infrastructure Testbed
Principal investigators: LeonGarcia, Alberto
An FPGA Cluster for High-Performance Computing, Data Centre and Networking Applications
Principal investigators: Chow, Paul
FPGA acceleration of large-scale database searches
Principal investigators: Chow, Paul
Convolutional neural networks on a multi-FPGA platform
Principal investigators: Chow, Paul
Simulation framework for in-memory key-value store architecture exploration
Principal investigators: Chow, Paul
Computing Architectures and Programming Methodologies for Heterogeneous High-Performance Computing and Embedded Applications
Principal investigators: Chow, Paul
NSERC Strategic Network: Smart applications on virtual infrastructure
Principal investigators: LeonGarcia, Alberto
From CIHR, NSERC and SSHRC funding decisions: CIHR since 2008, NSERC since 1991 and SSHRC since 1998, including their latest published competition results.
Frequent collaborators
- Lothar Lilge and Paul Chow: 1 shared paper
- Lothar Lilge and Jonathan Rose: 1 shared paper
- Paul Chow and Jonathan Rose: 1 shared paper
- Electrical and Computer Engineering
- Electrical & Computer Engineering
- Physics
Co-authors at University of Toronto, colored by department. Thicker lines mean more shared papers; select anyone to open their profile and their own map.
A short, specific email works best. This draft uses one of their recent papers; replace the parts in brackets with your own details before sending.